FIG. 6 of the present application shows an example of prior-art image reading apparatus. The illustrated image reading apparatus includes a substrate 100, and a case 200 to which the substrate is mounted. The substrate has a rectangular configuration elongated in a direction perpendicular to the sheet surface of the figure. The substrate 100 has an upper surface on which a plurality of light sources 101 and a plurality of sensor IC chips 102 are mounted. The light sources 101 are aligned along a first side edge 100a of the substrate 100 with predetermined intervals. The sensor IC chips 102 aligned along a second side edge 100b of the substrate 100. Each of the sensor IC chips 102 has an upper surface formed with a light receiving portion 102a. 
The case 200 is formed with a light path 201 for guiding the light emitted from the light sources 101 to an image reading region S. A lens array comprising a plurality of lenses 105 is disposed below the image reading region S. The light reflected by the image reading region S is converged by the lenses 105 and received by the light receiving portion 102a of each sensor IC chip 102.
Each sensor IC chip 102 has the photoelectric conversion function and outputs an image signal of the level corresponding to the received amount of light. To obtain an image signal faithful to the object to be read, the light emitted from the light sources 101 need be prevented from directly reaching the light receiving portion 102a. For this purpose, a partition wall 202 is provided between the light sources 101 and the sensor IC chips 102. The partition wall 202 engages the upper surface of the substrate 100 and extends in the longitudinal direction of the substrate 100.
As indicated by double-dashed lines in FIG. 6, a connector 103 for external connection is attached to the substrate 100. The connector 103 is connected to a wiring pattern (not shown) formed on the upper surface of the substrate 100. The wiring pattern is connected to the light sources 101 and the sensor IC chips 102. Such an image reading apparatus is disclosed in JP-A 2001-339574, for example.
In the image reading apparatus of FIG. 6, the wiring pattern is connected to each IC chip 102 via a wire W. Specifically, the upper end of the wire W is connected to the IC chip 102, whereas the lower end of the wire is connected to the wiring pattern.
The prior-art structure has the following drawbacks. As shown in FIG. 6, the lower end of the wire W is connected to the wiring pattern on the right side of the chip 102 (adjacent the second side edge 100b). With such an arrangement, in mounting the substrate 100 to the case 200, the operator's hand or the case 200 is likely to come into contact with the wire W. When such contact occurs, the wire W may be broken or the connection between the wire W and the chip 102 or the wiring pattern may fail.